This is a counterpart of, and claims priority to, Japanese Patent Application No. 2000-010250, filed on Jan. 17, 2000, the contents of which are incorporated herein by reference.
1. Field of the Invention
This invention relates to a semiconductor device and to a method for manufacturing the same. In particular, the present invention relates to a MOSFET which has side wall structure and to a method for manufacturing the same.
2. Description of the Related Art
A Self-Aligned Contact (SAC) method is an important technique used in fabricating semiconductor devices. This technology is described in the article entitled xe2x80x9cA Process Technology for 1 Giga-Bit DRAMxe2x80x9d IEDM Tech. Dig., pp907-910, 1995.
SiN is generally used as sidewalls of a gate electrode in the SAC process. This is because the etching rate of SiN is different from that of silicon-oxide, and therefore SiN sidewalls are used as a stopper in etching on an intermediate oxide layer.
FIG. 23 is a schematic diagram of a MOSFET 800 manufactured using an SAC process.
A gate oxide layer 824 having a constant thickness is formed on a silicon substrate 802. A gate electrode 816 is formed on the gate oxide layer 824. A SiN cap layer 820 is formed on the gate electrode 816. SiN sidewalls 822, which cover the side surfaces of the gate electrode 816, are formed on the gate oxide layer 824.
A heat treatment is generally performed in manufacturing of the MOSFET 800 after the formation of sidewall. In case of SiN sidewalls, hydrogen and nitrogen may be diffused into the silicon substrate 802 through the gate oxide layer 824 during the heat treatment. Therefore, MOSFETs which have SiN sidewalls are less reliable due to resultant hot-carrier degradation than MOSFETs which have sidewalls of silicon oxide. These problems are pointed out and discussed in the article entitled xe2x80x9cEnhancement of Hot-Carrier Induced Degradation under Low Gate Voltage Stress due to Hydrogen for NMOSFETs with SiN filmsxe2x80x9d S. Tokitoh et al. IRPS, pp 307-311, 1997 and xe2x80x9cHot-carrier Degradation Mechanism and Promising Device Design of nMOSFETs with Niteride Sidewall Spacerxe2x80x9d Y. Yamasugi et al. IRPS, pp 184-188, 1998.
An object of the present invention is to provide a reliable semiconductor device, and to provide a method for manufacturing the same.
According to one aspect of the present invention, for achieving the above object, A semiconductor device includes a semiconductor substrate, a silicon oxide layer formed over a surface of the semiconductor substrate, a gate electrode formed over a first portion of the silicon oxide layer, and a side wall structure formed over a second portion of the silicon oxide layer and adjacent the gate electrode, wherein a thickness of the second portion of the silicon oxide layer is greater than a thickness of the first portion of the silicon oxide layer.
According to another aspect of the present invention, for achieving the above object, A method for manufacturing a semiconductor device includes forming a gate oxide layer on a surface of a semiconductor substrate, forming a gate electrode and over a first portion of the gate oxide layer, forming a cap layer over the gate electrode, expanding a thickness of a second portion of the gate oxide layer other than the first portion located under the gate electrode, forming a side wall structure on the second portion of the gate oxide layer and adjacent the gate electrode, forming intermediate insulating layer over the cap layer and the side wall structure, and forming a contact hole in the intermediate insulating layer using a Self Aligned Contact process.